Foundation Series Family A Complete, Ready to Use  Programmable Logic Design Environment

More Information: HDL Design Made Simple Advanced Synthesis Technology Push-button, Mixed-level Design Environment Simplified IP / Core Integration Advanced Implementation Tools Foundation Series Product Configurations Feature Summary ModelSim Xilinx Edition

Buy Xilinx Products On-Line! These complete solutions can be purchased on-line at the Xilinx Silicon Xpresso Cafe:   Foundation Series Base Foundation Base Express Foundation Express ModelSim Xilinx Edition

The Foundation Series includes a comprehensive set of HDL design tools that support both VHDL and Verilog.  Graphical entry capabilities are provided in a complete, mixed level design environment, featuring:
 

HDL Editor - Provides extensive color coded editing and searching capabilities with integrated syntax checking

Language Assistant / Design Wizard - Speeds design entry by managing the Xilinx supplied library of commonly used language constructs and logic modules, as well as user created libraries

State Editor - Enables fast, intuitive, graphical entry of both simple and complex state machines.

HDL Synthesis and Optimization is performed using an embedded version of Synopsys FPGA Express technology. Coding errors found during compilation are highlighted directly in the source code, to simplify your debugging. All shipments of Foundation Series also include free evaluation versions of ModelSim PE HDL Simulation products, enabling Xilinx customers to test drive source code debugging tools from Model Technology Inc.

Vista - FPGA Express Schematic Viewer

Xilinx Foundation design flows embed the FPGA ExpressTM (v3.4) synthesis engine from Synopsys, delivering unprecedented levels of design performance for VHDL, Verilog or mixed VHDL and Verilog designs. The Express and Elite configurations of Foundation also include the FPGA Express graphical constraints editor, Time Tracker and Vista GUIs.

All of the advanced technology within the Foundation Series works seamlessly together. For example, you can embed VHDL and Verilog components into a top level schematic, and then simulate the entire design. With the push of a button, all of the design source files are compiled into the Xilinx Programmable Logic Device that you specified - meeting the timing specification you supplied using the Foundation Series Constraints Editor.

 So while you have complete control over every aspect of the design entry, synthesis and implementation process, you also can apply intuitive, push-button design techniques that simplify the completion of your design.

By allowing you to easily reuse Intellectual Property built elsewhere within your organization, or by a 3rd party provider, the Xilinx Core Generator allows you to focus your creative energies on designing the unique aspects of your design, ensuring your products' success in the marketplace. The 3.1i release of the Core Generator delivers improvements in the graphical user interface, design flows, and a host of new cores.

See the IP Center http://www.xilinx.com/ipcenter/index.htm to learn about the Intellectual Property that is available for your use.

Foundation Series also includes Xilinx' latest implementation tools, seamlessly integrated to help you create the most efficient and compact designs that operate at the highest possible speed. These features include

• Timing Driven Place and Route - Allows you to specify your timing requirements for critical paths. This feature often gives 30-40% performance improvements when speed is critical; you no longer need to manually fine-tune your design.

 
• Static Timing Analysis - Shortens your design process by providing an evaluation of your timing at various points in the implementation process, allowing you to make changes immediately.

 
• Simulation - Provides design verification before and after implementation, thus reducing the number of design iterations required to meet design specifications.

 
• Incremental Design Capability - Reduces your overall design cycle by allowing you to re-use previous iterations of your design.  This is very helpful for evaluating design alterations.

 
• Hierarchical Timing Analysis - The Interactive Timing Analyzer organizes and displays data that allows you to analyze the critical paths in your circuit, the cycle time of the circuit, the delay along any specified paths, and the paths with the greatest delay. It also provides a quick analysis of the effect of different speed grades on the same design.

 
• Integrated Logic Analysis - Xilinx has created the industries best Integrated Logic Analysis tool in order to address the debug verification bottleneck.  ChipScope ILA is a silicon based analysis solution that is included as a core function within your design. ChipScope ILA enables the in-system analysis of any signal that is available within the FPGA, while operating within the target system.

Foundation supports a variety of devices and is the first to support ten million gate FPGA design flows.  Foundation Series software is available in four product configurations; each licensed in accordance with the Annual License Program. The devices supported in each configuration is outlined below.
 

Foundation Device Support Summary
Family	Density	FND-BAS	FND-BSX	FND-EXP	FND-ELI
Virtex	XCV50 Only
	All devices up to XCV1000
Virtex-E	XCV50E Only
	All devices up to XCV1000E
	All devices up to XCV3200E
Virtex-EM	XCV405EM and XCV812EM
Spartan	XCSxx  (All Devices)
SpartanXL	XCSxxXL  (All Devices)
Spartan-II	All Devices up to XCS200
XC9500 Series	XC9500 XV/XL  (All Devices)
XC4000 Series	XC4000E/L/EX (All Devices)
	XC4000XL/XLA (All devices up to XC4020)
	XC4000XL/XLA (All devices)
	XC4000XV (All devices)
XC3000 Series	XC3x00A/L (All Devices)
XC5200 Series	XC5200 (All Devices)

*Note: CoolRunner Series is only available in WebFITTER and WebPACK at this time.

All Foundation Series product configurations other than Foundation Base embed FPGA Express synthesis technology from Synopsys providing unprecedented levels of design performance, and productivity for your VHDL and Verilog HDL designs.  Foundation Express and Foundation Elite also include the FPGA Express graphical constraints editor, Time Tracker and Vista GUIs.

Features		Foundation Series Part Numbers
		FND-BAS		FND-BSX		FND-EXP		FND-ELI
Synthesis Constraints Editor  and Timing Analyzer
Synopsys FPGA Express Synthesis (VHDL and Verilog synthesis)
Web Enabled Design Features
ABEL Synthesis
HDL Design Tools HDL Wizard, Context Sensitive HDL Editor, Graphical State Editor, and Language Assistant
Schematic Editor
LogiBLOX Module Generator
Xilinx CORE Generator System
Simulator (Functional and Timing)
HDL Simulation Libraries  (UniSim and Simprim)
EDIF, VHDL (VITAL), and Verilog  Back Annotation
Implementation Tools Design Manager, Flow Engine, Timing Analyzer, Hardware Debugger, JTAG Programmer, PROM File Formatter, Graphical Constraint Editor, Graphical Floorplanner

For more information on the Xilinx Software Solutions, please visit the Software Solutions Page or contact your local Xilinx sales office.

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